1. Field Of The Invention
The invention relates to semiconductor product and, more particularly, to a metal-oxide semiconductor (MOS) transistor for reducing short-channel effects.
2. Description of Related Art
Semiconductor devices can work faster by scaling down their dimensions. Therefore the channel length of a metal-oxide semiconductor (MOS) transistor is being scaled down. However, short-channel effects will arise when the channel length shortened to a certain degree, leading to the worsening of device performance, even malfunctioning. The short-channel effects can be reduced by decreasing the thickness of a gate insulation layer or producing a source and drain structure with shallow junctions. However, the thinness of the existing gate insulation layer has approached a limit; that is, when further decreasing the thickness, an increasing leakage current even a breakdown will easily arise in the gate. Therefore, further decreasing the thickness of a gate insulation layer is not an effective method for reducing the short-channel effects. In addition, by producing a source and drain structure with shallow junctions to reduce the short-channel effects is also difficult to achieved.
For reducing the short-channel effects, an epitaxial technique is usually used to produce an elevated source and drain structure. However, the epitaxial technique is difficult to control and has the problem of high complexity, high cost, high defect density, etc.